By José T. de Sousa
Boundary-Scan Interconnect Diagnosis explains tips to synthesize electronic diagnostic sequences for cord interconnects utilizing boundary-scan, and the way to evaluate the standard of these sequences. Its value has to do with designing complicated digital platforms utilizing pre-designed highbrow estate (IP) cores, that is turning into more and more renowned these days. considering that exams for pre-designed cores could be provided with the cores themselves, the one extra exams that must be built to check and diagnose the full procedure are these for cord interconnects among the cores.
along with the trivial suggestions which are usually used to resolve this challenge, there are various extra equipment that allow major optimizations of try out vector size and/or diagnostic solution. The e-book surveys all latest equipment of this sort and proposes new ones. within the new technique circuit and interconnect faults are rigorously modeled, and graph recommendations are utilized to unravel the matter. the unique characteristic of the hot process is the truth that it may be adjusted to supply shorter try out sequences and/or better diagnostic answer. The effectiveness of latest and proposed equipment is then evaluated utilizing genuine digital assemblies and released statistical facts for a precise production procedure from HP.
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Extra info for Boundary-Scan Interconnect Diagnosis
1 establishes that any fault F will be detected as long as it behaves according to the synthetic fault models. , 1990) are impossible. To qualify as a behavioral diagnostic scheme detection must be guaranteed. 1. 2 is used for fault isolation. 2 for fault isolation, all single faults of F will be diagnosed. 40 Boundary-Scan Interconnect Diagnosis To prove that no diagnosis of F will be incorrect note the following. 1 is that a detectable fault F has either unjustified opens or shorts between net receivers.
The existence of a standard enables portable testers to be used. These testers can perform maintenance operations across a variety of different systems. The above discussion leads to an important point: since the interconnect test set is a fundamental component of POST, it is most important if it can be kept small. , 1992) and distributed among the slaves. Alternatively, they may be managed by the slaves themselves in a decentralized fashion (Su and Jou, 1999). In either case, having a small test set can simplify the hardware and reduce the POST application time.
For an outline of the organization of the book the reader is referred to the last section of the preface. 2 INTERCONNECT CIRCUIT AND FAULT MODELS In this chapter models for the interconnect circuit and interconnect faults in electronic assemblies (EAs) are presented. It is assumed that boundary-scan (BS) is being used, so that any net can be driven or sensed using the boundaryscan cells (BSCs) or the EA’s primary I/Os. Using conventional terms from the discipline of electronic testing, each net is fully controllable and fully observable.