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By Subir Kumar Sarkar, Asish Kumar De, Souvik Sarkar

This ebook specializes in the fundamental ideas of electronic electronics and good judgment layout. It is designed as a textbook for undergraduate scholars of electronics, electric engineering, computing device technological know-how, physics, and knowledge know-how. The textual content covers the syllabi of a number of Indian and international universities. It depicts the excellent assets at the fresh principles within the zone of electronic electronics explored by way of prime specialists from either and academia. a great number of diagrams are supplied to demonstrate the ideas relating to electronic electronics in order that scholars can simply understand the topic. Solved examples in the textual content clarify the strategies mentioned and routines are supplied on the finish of every chapter.

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Universal gates: The two gates namely NAND and NOR are called universal gates as we can realize all the other gates from those two gates separately. So, as any logic gate can be realized by using either NAND or NOR gates only and hence NAND and NOR are called universal gates. 16 NAND as a Universal Gate Any gate that can realize all logical functions is said to be universal gate. 25 NOT gate from NAND gate. The logic circuit of a NOT gate from a NAND gate is shown in Fig. 25. So, a NAND gate acts as a NOT gate with 1 input and 1 output.

In general, we can say if we combine 2n adjacent cells, n variables are eliminated. Three cells cannot combine, combination of cells always in multiples of 2n (2, 4, 8, 16, … ). But six cells, 12 cells (multiple of 2) cannot be combined for simplification. Three variables Karnaugh Map: Let us take an example of three variables K map. y = f (A, B, C ) = ∑m (1, 3, 5, 7)→As it has three variables hence there are 23 = 8 cells which can be arranged in two rows and four columns.

2 XNOR Gate or Equality Detector It has got two or more inputs and one output. The output of XNOR gate = 0, if inputs contains odd number of 1s. Output of XNOR gate = 1, if inputs contains all zeroes even number of 1s. indd 24 10/24/2014 9:17:57 PM Logic Gates and Logic Circuits 25 Logical symbol for XNOR or equality detector is shown in Fig. 19. 9. The XOR gate followed by inverter gate is XNOR gate (Fig. 19). 19 XNOR gate. 9 XNOR gate Definition Truth table The output of XNOR gate = 0 if inputs contains odd number of 1’s.

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